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Browsing by Author "Pawan Kumar Kulriya"

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    PublicationArticle
    Role of ultrathin Ti3C2Tx MXene layer for developing solution-processed high-performance low voltage metal oxide transistors
    (American Institute of Physics, 2024) Ankita Rawat; Utkarsh Pandey; Ritesh Kumar Chourasia; Gaurav Rajput; Bhola Nath Pal; Nitesh K. Chourasia; Pawan Kumar Kulriya
    Metal oxide transistors have garnered substantial attention for their potential in low-power electronics, yet challenges remain in achieving both high performance and low operating voltages through solution-based fabrication methods. Optimizing interfacial engineering at the dielectric/semiconductor interface is of utmost importance in the fabrication of high-performance thin film transistors (TFTs). In the present article, a bilayer Ti3C2Tx-MXene/SnO2-semiconductor (Tx stands for surface termination) configuration is used to fabricate a high-performance n-type thin film transistor by using an ion-conducting Li-Al2O3 gate dielectric on a p+-Si substrate, where electrical charges are formed and modulated at the Li-Al2O3/SnO2 interface, and Ti3C2Tx-MXene nanosheets serve as the primary electrical charge channel due to their long lateral size and high mobility. A comparative characterization of two distinct TFTs is conducted, one featuring Ti3C2Tx MXene and SnO2 semiconductor layer and the other with SnO2 only. Notably, the TFT with the Ti3C2Tx MXene layer has shown a significant boost in the carrier mobility (10.6 cm2/V s), leading to remarkable improvements in the on/off ratio (1.3 × 105) and subthreshold swing (194 mV/decade), whereas the SnO2 TFT without the Ti3C2Tx MXene layer shows a mobility of 1.17 cm2/V s with 8.1 × 102 on/off ratio and 387 mV/decade subthreshold swing. This investigation provides a possible way toward the development of high-performance, low-voltage TFT fabrication with the MXene/semiconductor combination. © 2024 Author(s).
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