Design and Simulation of Triple Material Gate InAs/Si Heterojunction TFET on SEL-BOX Substrates: Temperature Impact Analysis

Abstract

In this study, we have reported TCAD assessment-based analyses of DC, RF/analog, and linearity/intermodulation distortions of a triple-material-gate (TMG) electrode-based InAs/Si hetero-junction (HJ) TFET on SEL-BOX substrate (STFET). The gate electrode consists of three different metals of work function value 4.2 eV, 4.5 eV, and 4.0 eV in a cascaded manner. The gate dielectric consists of HfO2/SiO2 in a vertically stacked form in the proposed TMG-HJ-STFET structure. The electrical parameters of the proposed STFET structure have been shown to be better than those of the double-material-gate (DMG) and single-material-gate (SMG) based HJ-STFET structures. Numbers of electrical performance parameters such as the electric field, ION, IOFF, ION/IOFF ratio, subthreshold swing (SS), transconductance (gm), parasitic capacitances, and transit frequency (fT) have been investigated for all three HJ-STFETs structures under study. Linearity/intermodulation distortion investigation has been done by analysing of some important linearity parameters such as gm2, VIP2, gm3, VIP3, IIP3, IMD3 and 1-dB compression point. In Addition, we have successfully checked the temperature variation impact on some electrical parameters of the proposed structure, TGM-HJ-STFET. © 2021 IEEE.